A Process-Algebraic Approach to Security-Aware Scheduling of Dynamic 
Partial Reconfiguration on FPGA Devices

In this talk, an introduction is given on reconfigurable architectures, 
and in particular the feature of dynamic partial reconfiguration. An 
approach to reconfiguration scheduling is presented which is based on 
the pi-calculus. Different avenues of data flow within partially 
reconfigurable systems are then identified. The reconfiguration 
schedule is extended by certain security types. By employing type 
information, the security of the schedule can be established using 
the presented verification rules and the associated verification tool.